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PIC18F1230/1330

DS39758D-page 22

2009 Microchip Technology Inc.

TABLE 3-2:

CAPACITOR SELECTION FOR

CRYSTAL OSCILLATOR

An external clock source may also be connected to the

OSC1 pin in the HS mode, as shown in Figure 3-2.

FIGURE 3-2:

EXTERNAL CLOCK

INPUT OPERATION

(HS OSCILLATOR

CONFIGURATION)

3.3

External Clock Input

The EC and ECIO Oscillator modes require an external

clock source to be connected to the OSC1 pin. There is

no oscillator start-up time required after a Power-on

Reset or after an exit from Sleep mode.

In the EC Oscillator mode, the oscillator frequency

divided by 4 is available on the OSC2 pin. This signal

may be used for test purposes or to synchronize other

logic. Figure 3-3 shows the pin connections for the EC

Oscillator mode.

FIGURE 3-3:

EXTERNAL CLOCK

INPUT OPERATION

(EC CONFIGURATION)

The ECIO Oscillator mode functions like the EC mode,

except that the OSC2 pin becomes an additional

general purpose I/O pin. The I/O pin becomes bit 6 of

PORTA (RA6). Figure 3-4 shows the pin connections

for the ECIO Oscillator mode.

FIGURE 3-4:

EXTERNAL CLOCK

INPUT OPERATION

(ECIO CONFIGURATION)

Osc Type

Crystal

Freq

Typical Capacitor Values

Tested:

32 kHz

30 pF

1 MHz

4 MHz

15 pF

4 MHz

10 MHz

20 MHz

25 MHz

15 pF

Capacitor values are for design guidance only.

Different capacitor values may be required to produce

acceptable oscillator operation. The user should test

the performance of the oscillator over the expected

VDD and temperature range for the application.

See the notes following this table for additional

information.

Note 1:

Higher capacitance increases the stability

of the oscillator but also increases the

start-up time.

When operating below 3V VDD, or when

using certain ceramic resonators at any

voltage, it may be necessary to use the

HS mode or switch to a crystal oscillator.

Since each resonator/crystal has its own

characteristics, the user should consult

the resonator/crystal manufacturer for

appropriate

values

external

components.

Rs may be required to avoid overdriving

crystals with low drive level specification.

Always verify oscillator performance over

the VDD and temperature range that is

expected for the application.

OSC1

OSC2

Open

Clock from

Ext. System

PIC18FXXXX

(HS Mode)

OSC1/CLKI

OSC2/CLKO

FOSC/4

Clock from

Ext. System

PIC18FXXXX

OSC1/CLKI

I/O (OSC2)

RA6

Clock from

Ext. System

PIC18FXXXX

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